DAQ Application: Trigger Out Modification for CP500 Boards | GaGe

National R&D Laboratory Application Case Study - Data Acquisition Radar / Lidar / Sonar

National Research & Development Laboratory Applications

Trigger Out Modification for CP500 Class Boards

Customer Case

Many A/D applications including Ultrasonics, Radar, Lidar, Hard Disk testing and CCD capture require maximal synchronicity between a trigger and the sampling clock.

GaGe Case Solution

GaGe now offers the TRIGGER OUT option as a means of synchronizing systems to the sampling clock on GaGe's CP500-class of A/D and scope cards, including CS8500, CS12100 and CS1250.

The need for synchronicity can be understood by considering a typical ultrasonic pulse-echo system. An ultrasonic pulser-receiver generates ultrasonic pulses from a transducer which, microseconds later, receives echo signals reflected from a test specimen. The pulser-receiver provides an RF output of the echo signals along with a synchronizing trigger pulse.

If experimental conditions do not change, there remains a constant time delay between the generated pulse and trigger output. Electrically speaking, the ultrasonic system behaves like a delayed analog pulse generator. An absolute measure of this time delay is rarely necessary. Different acquisitions of one identical signal, however, must show the same time delay with no artificial changes that are artifacts of the data acquisition itself. In this way, real changes in the time delay resulting from changes in experimental conditions can be precisely followed.

In order to demonstrate asynchronous triggering, we have externally triggered a wide-band pulse generator with a 1 kHz function generator in the figure below. The pulse provides the signal input to a CompuScope 8500 A/D card which samples at 500 MS/s. The 1 kHz square wave also externally triggers the CS8500. Nine successive data records were captured with the GaGeScope PC oscilloscope software and are displayed in the following figures 2a and 2b.

Asynchronous Triggering Set-Up Figure

Figures 2a and 2b show that there is an artificial jitter between different records. This jitter is a fundamental consequence of the asynchronicity between the trigger signal and the CS8500 board's free-running sampling clock.

Asynchronous Data Record Figure 2a

Asynchronous Data Record Figure 2b

As illustrated in Figure 3, the asynchronous trigger from the function generator may arrive at any time between two rising edges of the CS8500 sampling clock. In the extreme, the trigger may occur just after the last pre-trigger point or just before the trigger point and register the same trigger point. This accounts for the one point (1/ (500 MS/s) = 2 ns) jitter observed in Figures 2a and 2b.

Triggering Signals Figure 3

In order to improve on the intrinsic one-point jitter of an asynchronous system, we synchronously trigger the pulser using the TRIGGER OUT signal. As shown in Figure 3, the TTL TRIGGER OUT signal goes from low to high on the next rising edge of the sampling clock after the external trigger signal is received. Figure 4 shows the synchronous triggering setup. The CS8500 is still triggered by the function generator, but the pulser is now synchronously triggered by the TRIGGER OUT signal.

In the setup of Figure 4, the function generator can be viewed as triggering the pulser through the CS8500's EXTERNAL TRIGGER/TRIGGER OUT path which synchronizes it to the CS8500's sampling clock. In a similar way, a trigger line in an existing system can be broken and routed through this path to make it synchronous with the CS8500.

Synchronous Triggering Set-Up Figure 4

Nine records were captured by GaGeScope as before and are plotted in Figures 5a and 5b. Figures 5a and 5b clearly show the advantage of synchronous triggering. The jitter between different data records has been reduced to well below 0.5 ns. This small jitter arises due to the inevitable small instabilities in the electrical components. Triggering stability, therefore, has reached the fundamental limits of the hardware.

We might have issued a trigger command in software instead of externally triggering the CS8500 with the function generator. This could be done as soon as the last record capture was handled. In this way, the maximum pulse repetition rate would be realized since the pulse would be triggered as soon as the board was ready to accept a trigger.

As we have shown, the TRIGGER OUT option allows the user to achieve sub-sample triggering stability and to maximize CompuScope timing performance.

Synchronous Data Records Figure 5a

Synchronous Data Records Figure 5b

GaGe Case Recommended Products

  • TRIGGER OUT Option for Select CompuScope Boards

Research & Development Application Request

We encourage you to contact us and discuss your research & development application in more detail with our engineering team. GaGe can provide tailored custom data acquisition hardware and software solutions to meet specific application requirements.